Design for Test (DFT)

ASIP provides complete turn-key solution for DFT (Design-For-Test) starting with defining the Test Strategy, DFT Architecture, DFT Implementation, Test time/cost analysis, Test content generation (Scan ATPG), PowerOn of Test patterns and all Post-Si activities to meet the Product DPM, Test cost & Yield requirements.

• • DFT Architecture
  • Test Strategy
  • Test time/cost analysis
  • TAP/Boundary Scan
  • Memory BIST
  • Scan ATPG
  • Timing closure of DFT
  • Simulation of all Test content
  • ATPG coverage
  • First-Si PO of all DFT content
  • Failure Debug & Diagnosis
  • Yield Analysis
  • HVM (High Volume Mfg) patterns